implemented , addr=5f78a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a8,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78ac,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b8,data=0
)Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
VREG = 03
DIV32S matched 1% @ 0x8C091086
DIV32S matched 100% @ 0x8C09108C
DIV32S matched 1% @ 0x8C091086
DIV32S matched 100% @ 0x8C09108C
div32s 1/0/3
DIV32S matched 1% @ 0x8C0911E4
DIV32S matched 100% @ 0x8C0911EC
DIV32S matched 1% @ 0x8C09126E
DIV32S matched 1% @ 0x8C0911E4
DIV32S matched 100% @ 0x8C0911EC
div32s 1/0/3
DIV32S matched 1% @ 0x8C09126E
DIV32S matched 1% @ 0x8C091278
DIV32S matched 1% @ 0x8C091278
VREG = 03
VREG = 03
VREG = 03
ThreadEnd
Device caps... VS : FFFE0300 ; PS : FFFF0300
Will use Float Z Buffering Emulation (D24S8+FPE)
Will use Vertex Shaders
drkpvr: Initialising windowed AA:0x0
Using Vertex Shaders/vs_3_0
Using Pixel Shaders/ps_3_0
SPI : unkown ? [0x71]
CE: Block will be demoted to manual for the CE pass
DIV32S matched 1% @ 0x8C00D0D6
DIV32S matched 100% @ 0x8C00D0DE
DIV32S matched 1% @ 0x8C00D160
DIV32S matched 1% @ 0x8C00D0D6
DIV32S matched 100% @ 0x8C00D0DE
div32s 1/0/3
DIV32S matched 1% @ 0x8C00D160
DIV32S matched 1% @ 0x8C00D16A
DIV32S matched 1% @ 0x8C00D16A
VREG = 03
DIV32S matched 1% @ 0x8C0098D8
DIV32S matched 100% @ 0x8C0098DE
DIV32S matched 1% @ 0x8C0098D8
DIV32S matched 100% @ 0x8C0098DE
div32s 1/0/3
DIV32S matched 1% @ 0x8C009A36
DIV32S matched 100% @ 0x8C009A3E
DIV32S matched 1% @ 0x8C009AC0
DIV32S matched 1% @ 0x8C009A36
DIV32S matched 100% @ 0x8C009A3E
div32s 1/0/3
DIV32S matched 1% @ 0x8C009AC0
DIV32S matched 1% @ 0x8C009ACA
DIV32S matched 1% @ 0x8C009ACA
Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f74e4,data=42fe
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f74e4,data=1fffff
)SPI : unkown ? [0x71]
Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f68a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f68ac,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a8,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78ac,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b8,data=0
)VREG = 03
DIV32S matched 1% @ 0x8C13296A
DIV32S matched 100% @ 0x8C132970
DIV32S matched 1% @ 0x8C13296A
DIV32S matched 100% @ 0x8C132970
div32s 1/0/3
CE: Block will be demoted to manual for the CE pass
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]
Error in .\dc\mem\sh4_internal_reg.cpp:WriteMem_area7:676 -> Out of range on re
gister index . 1fd0000e
)Error in .\dc\mem\sh4_internal_reg.cpp:WriteMem_area7:732 -> Write to Area7 no
t implemented , addr=1fd0000e,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f74e4,data=1fffff
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f68a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f68ac,data=0
)Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a8,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78ac,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b8,data=0
)VREG = 03
VREG = 03
VREG = 03
SPI : unkown ? [0x71]
DIV32S matched 1% @ 0x8C00CF78
DIV32S matched 100% @ 0x8C00CF7E
DIV32S matched 1% @ 0x8C00CF78
DIV32S matched 100% @ 0x8C00CF7E
div32s 1/0/3
Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f68a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f68ac,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78a8,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78ac,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b0,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b4,data=0
)Error in .\dc\mem\sb.cpp:sb_WriteMem:423 -> Write to System Control Regs , not
implemented , addr=5f78b8,data=0
)Invalid GD-DMA start, SB_GDEN=0.Ingoring it.
VREG = 03
DIV32S matched 1% @ 0x8C091086
DIV32S matched 100% @ 0x8C09108C
DIV32S matched 1% @ 0x8C091086
DIV32S matched 100% @ 0x8C09108C
div32s 1/0/3
DIV32S matched 1% @ 0x8C0911E4
DIV32S matched 100% @ 0x8C0911EC
DIV32S matched 1% @ 0x8C09126E
DIV32S matched 1% @ 0x8C0911E4
DIV32S matched 100% @ 0x8C0911EC
div32s 1/0/3
DIV32S matched 1% @ 0x8C09126E
DIV32S matched 1% @ 0x8C091278
DIV32S matched 1% @ 0x8C091278
VREG = 03
VREG = 03
VREG = 03
DIV32S matched 1% @ 0x8C0294A6
DIV32S matched 100% @ 0x8C0294AC
DIV32S matched 1% @ 0x8C0294A6
DIV32S matched 100% @ 0x8C0294AC
div32s 1/0/3
SPI : unkown ? [0x71]
SPI : unkown ? [0x71]