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· Read Only
5,614 Posts
Discussion Starter · #1 · (Edited)
[Super/MEGA]CHIPX thread

Let's keep a CHIPX discussion thread.

CHIP8 Specs:
16 8bit general purpose registers(really, 15 registers, as Register F(16) is typically used as a flag for subtraction/addition/sprite collision)
16bit Program Counter(Ranges from 0-0xFFF)
16bit Memory addressing register(referred to as I)
8bit Stack Pointer(can be any size you want, it doesn't matter, but I use 8bit; it simply points to a 16bit elementn the stack)
256 byte stack(16 16bit spaces(something like u16 Stack[16])
4KBytes RAM(512 bytes reserved for chip8 font at location 0x000-0x050(80 bytes), and interpreter(which on emulators, will be zeroes since the interpreter would be useless))
64 x 32 screen resolution
2 colour screen(black and white)
Hex keypad for input(16 keys, labeled 1-0, A-F)

Note: Super/Mega are both backward compatible with CHIP8, and inherit its base specs[except for MEGAChip, which gains colour]. They simply add on to CHIP8.
SuperChip 48 Specs:
128 x 64 screen resolution
Adds 7 8bit registers(HP48 flags?)

SuperChip 48 adds new opcodes:
00CN* Scroll display N lines down
00FB* Scroll display 4 pixels right
00FC* Scroll display 4 pixels left
00FD* Exit CHIP interpreter
00FE* Disable extended screen mode
00FF* Enable extended screen mode for full-screen graphics
DXYN* Show N-byte sprite from M(I) at coords (VX,VY), VF :=
collision. If N=0 and extended mode, show 16x16 sprite.

FX30* Point I to 10-byte font sprite for digit VX (0..9)
FX75* Store V0..VX in RPL user flags (X <= 7)
FX85* Read V0..VX from RPL user flags (X <= 7)

MEGAChip Specs:
- 256x192 resolution
- Indexed coloring (255 colors max + transparency)
- Fixed high-speed speed in megachip mode
- Custom sprite sizes
- Update timing at ClearScreen
- Extended I-register range (24 bit addessing, 32MB max)
- Digitised sound (mono 8bit)
- Downward compability (you can run your old CHIP/S-CHIP games)
- Spritecolor 0 = transparent.
- Spritecollision will occur if (backgroundcolor>0) when plotting spritepixel.

MEGAChip adds new opcodes:
0010+ Disable Megachip mode (MEGAoFF)
0011+ Enable Megachip mode (MEGAON)
01nn+ I=(nn<<16)+nnnn , PC+=2; (LDHI I,nnnnnn , always follow LDHI with a NOP)
02nn+ Load nn-colors palette at I (LDPAL nn)
03nn+ Set Sprite-width to nn (SPRW nn)
04nn+ Set Sprite-height to nn (SPRH nn)
05nn+ Set Screenalpha to nn (ALPHA nn, will become FADE nn)
060n+ Play digitised sound at I (DIGISND), will add n for loop/noloop
0700+ Stop digitised sound (STOPSND)
080n+ Set sprite blendmode (BMODE n) (0=normal,1=25%,2=50%,3=75%,4=addative,5=multiply)
00BN+ Scroll display N lines up (SCRU n)

1. Chip8 thread on Emutalk: Chip 8 -
3. Cowgod's documentation: Cowgod's Chip-8 Technical Reference
4. Wikipedia: CHIP-8 - Wikipedia, the free encyclopedia
5. David Winter's docs: CHIP8
6. CHIP8 tutorial by Codeslinger(Try to avoid using this unless you really need help since it has full source!):
7. MEGAChip document from the development kit: - Dedicated to Chip-8 , SuperChip and MegaChip Emulation / Development
8. RCA 1802(required for hybrid CHIP8 games) CPU documents:
COSMAC ELF and the TinyELF Emulator - The 1802 in Microcomputer History
RCA 1802 - Wikipedia, the free encyclopedia
The 1802 Instruction Set
RCA Cosmac VIP - Instruction manual for VP-111
RCA COS/MAC Microprocessor Trainers
RCA 1802

Test ROM(s)/Public Domain ROM(s):
Snafu by Shendo
Source to above rom by Shendo
0xFX0A test rom by Shendo
Test rom by tronix286
Test rom by BestCoder

Cool stuff/toys:
Chip8 pascal compiler by tronix286

Update (August 7, 2012): Updated first post with yet another new test rom by BestCoder.

· PReP - Lizard of Reason
1,103 Posts

· Banned
35,081 Posts
Simple Directmedia Layer, can connect with any available API in the system, most commonly video implementation connects to OpenGL.

· You're already dead...
10,293 Posts
Not totally sure how to do that, but I'll read up on it. :D;
its basically a way to show you what instructions are being run and at what address; it also can show registers, and what they have in them.

you can also make it so that the debugger goes by 1 instruction at a time, so you can find bugs easier.

shendo has a pic of his debugger in his chip8 thread:

anyways, its not really needed, but it helps 'debugging' for problems.
pcsx2's debugger for example, doesn't even work. :lol:

· Premium Member
5,284 Posts
Not totally sure how to do that, but I'll read up on it. :D;
Well it doesn't have to be anything special.
If you take a look at my thread you will see that my debugger is simply 2 listboxes, one showing values of registers and other disassembled code.
When you have that you are able to check if each opcode you execute gives desired result.

Edit: I see cottonvibes beat me to it :p

· Read Only
5,614 Posts
Discussion Starter · #10 ·
I have a question. I'm looking at Cowgod's documentation( and he says the following about the character data/sprites:

The data should be stored in the interpreter area of Chip-8 memory (0x000 to 0x1FF).
He doesn't specify where though. Can I just put the 16 characters[0-F] in the first 80 bytes with no issue?

Also, thanks for all the positive feedback. It's encouraging. :)

· Level 9998
10,591 Posts
Yep, put the characters anywhere. Later on, when you run across an opcode that asks for the address, point it there. :)

P.S.: You may also put your own custom Chip8/SChip instructions there just for lols and giggles when something tries to call a system instruction in those addresses. :D But that's just for fun. It may mess what you are running up badly... so that's not very recommended.

· Read Only
5,614 Posts
Discussion Starter · #12 ·
Well, the characters are in the first bytes[0x0-0x5d], the ROM gets loaded at 0x200, and the rest of the RAM is zeroed. Now I'm ready to start fetching opcodes, right? Or did I miss any steps?

· Level 9998
10,591 Posts
Actually, I think program counter should be increased by 2 after every opcode regardless. Then if it's an opcode that skips the next instruction, increase the program counter by 2, if it's an opcode that delays the instruction, decrease program counter by 2.

· Read Only
5,614 Posts
Discussion Starter · #16 ·
Well I think I'm sort of getting it. I have it printing whatever opcodes it finds out to the screen[and it's wildly printing info like zeroes, FF98, etc], but I'm not sure if I'm reading the opcodes correctly.
I set regs.PC equal to 0x200 and have it going from there.

opcode = RAM[regs.PC] + RAM[regs.PC++];
cout << hex << opcode << endl;
Isn't this where bit shifting is supposed to come in?

· Premium Member
5,284 Posts
If you are asking how to know what instruction should be executed when you fetch an opcode you should AND it with 0xF000 and shift it to the right by 12.

You can also use higher part of the opcode (RAM[PC]) to get the same result:
switch ((RAM[PC] & 0xF0)>>4)
                case 0x00:

                case 0x01:

                case 0x02:

Some people split opcodes into nibbles so you may also take that approach.
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